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  73008 ti im no.a1283-1/14 specifications of any and all sanyo semiconductor co.,l td. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer ' s products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' sproductsor equipment. any and all sanyo semiconductor co.,ltd. products described or contained herein are, with regard to "standard application", intended for the use as general el ectronics equipment (home appliances, av equipment, communication device, office equipment, industrial equ ipment etc.). the products mentioned herein shall not be intended for use for any "special application" (medica l equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, t ransportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of re liability and can directly threaten human lives in case of failure or malfunction of the product or may cause har m to human bodies, nor shall they grant any guarantee thereof. if you should intend to use our products for app lications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. if there is n o consultation or inquiry before the intended use, our customer shall be solely responsible for the use. LA74322LP overview the LA74322LP is an audio i/o interface ic for cell phones that integrates, on a single chip, amplifiers for a monaural speaker, evr stereo he adphone, internal and ex ternal microphones, an d a receiver speaker. features ? int & ext mic amplifiers selectable (mic power supply built-in) ? alc amplifier (alc level: 3 levels selectable) ? base band/audio source input selector switch ? alc (through switch, alc level: 4 levels selectable) ? evr stereo headphone amplifier ? monaural speaker amplifier ? receiver speaker amplifier (mono) standby control ? i 2 c bus supported (first mode) specifications maximum ratings at ta=25 c parameter symbol conditions ratings unit supply voltage v cc max 5.5 v allowable power dissipation pd max ta 70 c, mounted on a specified board *1 tbd mw operating temperature topr -20 to +70 c storage temperature tstg -55 to +150 c * 1: mounted on a specified board: tbd ordering number : en*a1283 monolithic linear ic audio i/o interface for cell phone
LA74322LP no.a1283-2/14 operating conditions at ta = 25 c parameter symbol conditions ratings unit recommended supply voltage (v cc a) v cc a 3.0 v recommended supply voltage (v cc hp) v cc hp 3.0 v recommended supply voltage (v cc sp) v cc sp 3.6 v allowable operating voltage range (v cc a) v cc aop 2.7 to 3.6 v allowable operating voltage range (v cc hp) v cc hpop 2.7 to 3.6 v allowable operating voltage range (v cc sp) v cc spop *2 2.7 to 5.0 v * 2: take care not to exceed pd max. electrical characteristics at ta=25 c, v cc a=v cc hp=3.0v, v cc sp=5.0v, f=1khz, alc1 level=-17dbv mode, alc2 level=-11dbv mode ratings no. parameter symbol conditions min typ max unit circuit current 1 v cc a current dissipation i cc a v cc a=3.0v, mic1 on, audio source system (stereo) off, receiver system on 9.5 ma 2 v cc a standby current dissipation i cc as v cc a=3.0v, 0v applied to stanbdy pin 10 a 3 v cc hp current dissipation 1 i cc hp1 v cc hp=3.0v: receiver spk amp power save mode 8.5 ma 4 v cc hp current dissipation 2 i cc hp2 v cc hp=3.0v: h/p amp power save mode 2.7 ma 5 v cc hp standby current dissipation i cc hps v cc hp=3.0v, 0v applied to stanbdy pin 10 a 6 v cc sp current dissipation 1 i cc sp1 v cc sp=5.0v: spk power on mode 6.5 ma 7 v cc sp current dissipation 2 i cc sp2 v cc sp=5.0v: spk power save mode 0.3 ma 8 v cc sp standby current dissipation i cc sps v cc sp=5.0v, 0v applied to stanbdy pin 10 a mic output system 9 int mic voltage gain vgimic int mic input, v in =-29dbv 10 db 10 int mic output distorti on hdimic int mic input, v in =-29dbv, thd: from 2nd to 5th harmonic 0.03 % 11 int mic output noise voltage vnimic int mic no input, jis-a filter -100 dbv 12 int mic maximum input level vmimic int mi c input, int mic input level at which up to 5th order distortions of mic output are reduced to 3% or less -20 dbv 13 int mic supply vo ltage vvimic at 6.2k load 1.7 v 14 ext mic voltage gain vgemic ext mic input, v in =-29dbv 10 db 15 ext mic output distorti on hdemic ext mic input, v in =-29dbv, thd: from 2nd to 5th harmonic 0.03 % 16 ext mic output noise voltage vnemic ext mic no input, jis-a filter -100 dbv 17 ext mic maximum input level vmemic ext mi c input, ext mic input level at which up to 5th order distortions of mic output are reduced to 3% or less -20 dbv 18 ext mic supply voltage vvemic at 6.2k load 1.7 v rec output system : alc1 level=-17dbv mode 19 rec reference output level vorec alc1 input, v in =-40dbv -16.5 dbv 20 rec reference output dist ortion hdrec alc1 input, v in =-40dbv, thd: from 2nd to 5th harmonic 0.03 % 21 alc1 level characteristics voalc1 alc1 input, v in =-14dbv (reference+26db) -10 dbv 22 alc1 distortion characteri stics vdalc1 alc1 input, v in =-14dbv (reference+26db), thd: from 2nd to 5th harmonic 0.3 % 23 rec output noise voltage vnor al c1 no input, jis-a filter -83 dbv 24 alc1 maximum input level vmxalc alc1 input, alc1 input level at which up to 5th order distortions of rec output are reduced to 3% or less -10 dbv continued on next page.
LA74322LP no.a1283-3/14 continued from preceding page. ratings no. parameter symbol conditions min typ max unit evr output system : alc2 level=-11dbv mode 25 evr reference output level 1 (v o l=max) voevr1 audio source pin input, v in =-25dbv, evr=max -17.3 dbv 26 evr reference output distortion hdevr audio source pin input, v in =-25dbv, evr=max, thd: from 2nd to 5th harmonic 0.003 % 27 evr reference output level 2 (v o l=typ) voevr2 audio source pin input, v in =-25dbv, evr=typ (5bit: 11011) -22.5 dbv 28 evr reference output level 3 (v o l=min) voevr3 audio source pin input, v in =-25dbv, evr=min, jis-a filter -96 dbv 29 evr maximum input level vmxevr alc2=through mode, audio source input level at which up to 5th order distortions of evr output are reduced to 3% or less l -3 dbv h/p output system : measured at hp load = 16 , alc2=through mode 30 h/p reference output level vohp base band input, v in =-11dbv, evr=max -19 dbv 31 h/p reference output distortion hdhp base band input, v in =-11dbv, thd: from 2nd to 5th harmonic 0.1 % 32 h/p output noise voltage vnhp no base band input, evr=max, jis-a filter -100 dbv 33 h/p maximum input level vmxhp base band input, base band input level at which up to 5th order distortions of h/p output are reduced to 3% or less -10 dbv spk output system : measured at spk load = 8 , alc2 level=-11dbv mode 34 spk reference output level vospk audio source pin input, v in =-30dbv, v o l=max -4 dbv 35 spk reference output distortion vdspk audio source pin input, v in =-30dbv, v o l=max, thd: from 2nd to 5th harmonic 0.9 % 36 spk output noise voltage vnspk no input at audio source pin, evr=max, jis-a filter -70 dbv 37 spk maximum output power vmxspk audio s ource pin input, spk output power at which up to 5th order distortions of spk output are reduced to 3% or less, alc2=through mode 1000 mw 38 spk alc level 1 vospk1 audio source pin input, v in =-10dbv, v o l=max, lc2=-13dbv mode 4.5 dbv 39 spk alc level 2 vospk2 audio source pin input, v in =-10dbv, v o l=max, alc2=-12dbv mode 5.5 dbv 40 spk alc level 3 vospk3 audio source pin input, v in =-10dbv, v o l=max, alc2=-11dbv mode 6.4 dbv 41 spk alc level 4 vospk4 audio source pin input, v in =-10dbv, v o l=max, alc2=-10.5dbv mode 7 dbv receiver spk output system : measured at spk load = 32 42 receiver spk reference output level 1 (v o l=max) vorsp1 base band input, v in =-22dbv, v o l=max -4 dbv 43 receiver spk reference output distortion vdrsp base band input, v in =-22dbv, v o l=max, thd: from 2nd to 5th harmonic 0.9 % 44 receiver spk reference output level 2 (v o l=typ) vorsp2 base band input, v in =-22dbv, v o l=typ (5bit: 11011) -10 dbv 45 evr reference output level 3 (v o l=min) vorsp3 base band input, v in =-22dbv, evr=min, jis-a filter -80 dbv 46 receiver spk output noise voltage vnrsp base band no input, evr=max, jis-a filter -80 dbv 47 receiver spk maximum output power vmxrsp base band input, spk output power at which up to 5th order distortions of spk output are reduced to 3% or less 110 mw control system 48 serial clock frequency fclk i 2 c bus first mode 400 khz 49 serial input low level serlo 0 0.6 v 50 serial input high level serhi 2.4 3.5 v
LA74322LP no.a1283-4/14 electrical characteristic: seri al communication condition table address(0 1) address(0 2) address(0 3) address(0 4) no. symbol d 8 d 7 d 6 d 5 d 4 d 3 d 2 d 1 d 8 d 7 d 6 d 5 d 4 d 3 d 2 d 1 d 8 d 7 d 6 d 5 d 4 d 3 d 2 d 1 d 8 d 7 d 6 d 5 d 4 d 3 d 2 d 1 1 icca 0 0 1 0 0 0 1 1 1 1 1 0 1 1 1 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 2 iccas 0 0 1 0 0 0 1 1 1 1 1 0 1 1 1 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 3 icchp1 1 1 1 1 0 0 0 0 0 0 1 0 0 0 1 1 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 4 icchp2 1 1 1 1 0 0 1 1 1 1 1 0 1 1 1 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 5 icchps 1 1 1 1 0 0 0 0 1 1 1 0 1 1 1 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 6 iccsp1 1 1 1 1 0 0 1 1 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 7 iccsp2 1 1 1 1 0 0 1 1 0 0 1 0 0 0 1 1 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 8 iccsps 1 1 1 1 0 0 1 1 0 0 1 0 0 0 1 1 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 9 vgimic 0 0 1 0 0 0 1 1 1 1 1 0 1 1 1 1 0 1 1 0 0 0 0 0 1 1 1 0 0 0 0 0 10 hdimic 0 0 1 0 0 0 1 1 1 1 1 0 1 1 1 1 0 1 1 0 0 0 0 0 1 1 1 0 0 0 0 0 11 vnimic 0 0 1 0 0 0 1 1 1 1 1 0 1 1 1 1 0 1 1 0 0 0 0 0 1 1 1 0 0 0 0 0 12 vmimic 0 0 1 0 0 0 1 1 1 1 1 0 1 1 1 1 0 1 1 0 0 0 0 0 1 1 1 0 0 0 0 0 13 vvimic 0 0 1 0 0 0 1 1 1 1 1 0 1 1 1 1 0 1 1 0 0 0 0 0 1 1 1 0 0 0 0 0 14 vgemic 0 1 1 0 0 0 1 1 1 1 1 0 1 1 1 1 0 1 1 0 0 0 0 0 1 1 1 0 0 0 0 0 15 hdemic 0 1 1 0 0 0 1 1 1 1 1 0 1 1 1 1 0 1 1 0 0 0 0 0 1 1 1 0 0 0 0 0 16 vnemic 0 1 1 0 0 0 1 1 1 1 1 0 1 1 1 1 0 1 1 0 0 0 0 0 1 1 1 0 0 0 0 0 17 vmemic 0 1 1 0 0 0 1 1 1 1 1 0 1 1 1 1 0 1 1 0 0 0 0 0 1 1 1 0 0 0 0 0 18 vvemic 0 1 1 0 0 0 1 1 1 1 1 0 1 1 1 1 0 1 1 0 0 0 0 0 1 1 1 0 0 0 0 0 19 vorec 1 1 1 0 0 0 1 1 1 1 1 0 1 1 1 1 0 1 1 0 0 0 0 0 1 1 1 0 0 0 0 0 20 hdrec 1 1 1 0 0 0 1 1 1 1 1 0 1 1 1 1 0 1 1 0 0 0 0 0 1 1 1 0 0 0 0 0 21 voalc1 1 1 1 0 0 0 1 1 1 1 1 0 1 1 1 1 0 1 1 0 0 0 0 0 1 1 1 0 0 0 0 0 22 vdalc1 1 1 1 0 0 0 1 1 1 1 1 0 1 1 1 1 0 1 1 0 0 0 0 0 1 1 1 0 0 0 0 0 23 vnor 1 1 1 0 0 0 1 1 1 1 1 0 1 1 1 1 0 1 1 0 0 0 0 0 1 1 1 0 0 0 0 0 24 vmxalc 1 1 1 0 0 0 1 1 1 1 1 0 1 1 1 1 0 1 1 0 0 0 0 0 1 1 1 0 0 0 0 0 25 voevr1 1 1 1 1 0 0 1 1 0 0 1 0 0 0 1 1 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 26 hdevr 1 1 1 1 0 0 1 1 0 0 1 0 0 0 1 1 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 27 voevr2 1 1 1 1 0 0 1 1 0 0 1 0 0 0 1 1 0 0 0 1 1 0 1 1 1 1 1 0 0 0 0 0 28 voevr3 1 1 1 1 0 0 1 1 0 0 1 0 0 0 1 1 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 29 vmxevr 1 1 1 1 0 0 1 1 0 0 1 0 1 1 1 1 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 30 vohp 1 1 1 1 0 0 0 0 1 1 1 0 1 1 1 1 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 31 hdhp 1 1 1 1 0 0 0 0 1 1 1 0 1 1 1 1 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 32 vnhp 1 1 1 1 0 0 0 0 1 1 1 0 1 1 1 1 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 33 vmxhp 1 1 1 1 0 0 0 0 1 1 1 0 1 1 1 1 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 34 vospk 1 1 1 1 0 0 1 1 0 0 1 0 0 0 1 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 35 vdspk 1 1 1 1 0 0 1 1 0 0 1 0 0 0 1 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 36 vnspk 1 1 1 1 0 0 1 1 0 0 1 0 0 0 1 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 37 vmxspk 1 1 1 1 0 0 1 1 0 0 1 0 1 1 1 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 38 vospk1 1 1 1 1 0 0 1 1 0 0 0 0 0 0 1 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 39 vospk2 1 1 1 1 0 0 1 1 0 0 0 1 0 0 1 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 40 vospk3 1 1 1 1 0 0 1 1 0 0 1 0 0 0 1 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 41 vospk4 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 42 vorsp1 1 1 1 1 0 0 1 1 1 1 1 0 1 1 1 1 0 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 43 vdrsp 1 1 1 1 0 0 1 1 1 1 1 0 1 1 1 1 0 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 44 vorsp2 1 1 1 1 0 0 1 1 1 1 1 0 1 1 1 1 0 1 1 0 0 0 0 0 0 0 0 1 1 0 1 1 45 vorsp3 1 1 1 1 0 0 1 1 1 1 1 0 1 1 1 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 46 vnrsp 1 1 1 1 0 0 1 1 1 1 1 0 1 1 1 1 0 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 47 vmxrsp 1 1 1 1 0 0 1 1 1 1 1 0 1 1 1 1 0 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 it is sw of lch spk setting. here always sets ?1? = off.
LA74322LP no.a1283-5/14 serial data specification (i 2 c bus communication) [slave address: 1 1 1 0 1 0 0 0] 1 off 1 off 1 amp 1 amp 0 on 0 on 0 att 0 att lsb d1 rch h/p power save ctl d1 rch h/p rch speaker power save ctl d1 rch spk power d01(00001) d1 evr d1 gain d01(00001) d1 evr d1 gain 1 off 1 off 1 amp 1 amp 0 on 0 on 0 att 0 att d2 lch h/p power save ctl d2 lch h/p lch speaker power save ctl d2 lch spk power *note please set off. d02(00010) d2 evr d2 gain d02(00010) d2 evr d2 gain 1 on 1 off on 1 amp 1 amp 0 off 0 on off 0 att 0 att d3 alc2 det discharge ctl d3 alc2 det discharge rch alc2 ctl power save & through sw d3 alc2 through sw d04(00100) d3 evr d04 gain d04(00100) d3 evr d04 gain 1 on 1 off on 1 amp 1 amp 0 off 0 on off 0 att 0 att d4 alc1 det discharge ctl d4 alc1 det discharge lch alc2 ctl power save & through sw d4 alc2 through sw d08(01000) d4 evr d08 gain d08(01000) d4 evr d08 gain 1,1 - - - on 1,1 - - - on 1 amp 1 amp 1,0 - - on - 1,0 - - on - 0 att 0 att 0,1 - on - - 0,1 - on - - d5 0,0 on - - - 0,0 on - - - evr setting (sound source & base band) 5bit d16(10000) d5 evr d16 gain evr setting (receiver) 5bit d16(10000) d5 evr d16 gain 1 off 1 off 0 on 0 on d6 alc1 & rec amp power save ctl alc1 level=-21/-19/-17dbv ctl d6,d5 -21dbv -19dbv -17dbv off alc2 level =-13/-12/-11/-10.5dbv ctl d6,d5 -13dbv -12dbv -11dbv -10.5dbv rch evr power save ctl d6 rch evr power receiver evr power save ctl d6 receiver evr 1,1 off off 1,1 off off on 1 off 1 off 1,0 off off 1,0 off on off 0 on 0 on 0,1 off on 0,1 on off off d7 0,0 on off 0,0 on on off lch evr power save ctl d7 lch evr power receiver input select sw d7 input select sw 1 on 1 off 0 off 0 on data byte (underline is initial setting) msb d8 mic1 & 2 power save ctl mic1 or 2 input select d8,d7 mic1 mic2 sound source & base band (b.b.) input select d8,d7 lch input sw rch input sw b.b. input sw vref charge ctl d8 vref charge sw receiver speaker power save ctl d8 receiver speaker address (0 1) 00000001 (0 2) 00000010 (0 3) 00000011 (0 4) 00000100
LA74322LP no.a1283-6/14 package dimensions unit : mm (typ) 3302a pin assignment sanyo : vqlp40(5.0x5.0) 0.2 0.4 5.0 5.0 0.85 max 0.0 nom 1 40 0.35 0.35 (0.7) (0.7) top view side view side view bottom view 2 22 21 30 29 28 27 26 25 24 34 35 36 37 38 39 40 31 32 33 1 2 3 4 5 6 7 8 9 10 11 20 19 18 17 16 15 14 13 12 23 receiver(-)out mic1 in cloc k vref mic out agnd av cc dat a mic2 in mic1 v cc alc1 det rch(audio source)in base band out hp(r)in evr(r)out base band in lch(audio source)in alc2 det mic2 v cc alc1 in v cc sp(l) nc spk(r)-out spk(r)in v cc sp(r) spk(r)gnd spk(r)+out nc spk(l) gnd evr(l)out receiver gnd hp(l)in vrefsp receiver(+)out h/p gnd standby l h/p(l)out h/p(r)out receiver & hp v cc LA74322LP nc
LA74322LP no.a1283-7/14 table of input/output forms pin pin name dc voltage ac voltage description of functions equivalent circuit diagram in pin 1 receiver (-) output 1.65v reference output level =-10dbv (@ evr=max. audio source input =-30dbv) receiver reverse phase output pin 2 v cc a 3.0v power pin for analog signal part 3 clock clock input pin 4 data data input pin 5 a gnd 0v gnd pin for analog signal part continued on next page. 3 1k 4 ack tr 1k 5k v cc hp 20.5k 1 LA74322LP evr characteristic -80 -70 -60 -50 -40 -30 -20 -10 0 0 5 10 15 20 25 30 35 5bit data (decimal notation) attenuation [db] mute
LA74322LP no.a1283-8/14 continued from preceding page. pin pin name dc voltage ac voltage description of functions equivalent circuit diagram in pin 6 mic1 in 1.5v reference input level =-50dbv maximum input level =-20dbv mic1 input pin 7 mic2 in 1.5v reference input level =-50dbv maximum input level =-20dbv mic2 input pin 8 mic out 1.5v reference output level =-40dbv maximum output level =-10dbv mic output pin 9 mic1 v cc 2.3v mic1 power pin 10 vref 2.3v mic v cc and vref ripple rejection pin continued on next page. 500 vref 70k 6 v cc a 500 vref 70k v cc a 7 v cc a 7.5k 8 500 3.2k vref 2.2k 23k 9 v cc a 400 10 500 200k v cc a
LA74322LP no.a1283-9/14 continued from preceding page. pin pin name dc voltage ac voltage description of functions equivalent circuit diagram in pin 11 mic2 v cc 2.3v mic2 power pin 12 alc1 in reference output level =-40dbv maximum output level =-10dbv alc1 input pin 13 alc1 det alc1 detection pin 14 base_band out 1.5v reference output level =-16dbv maximum input level =-3dbv base band output pin 15 alc2 det alc2 detection pin continued on next page. 2.2k 23k 11 v cc a 1k vref 50k v cc a 12 13 1k 500 v cc a v cc a 7.5k 14 1k 6k vref 15 1k 500 v cc a
LA74322LP no.a1283-10/14 continued from preceding page. pin pin name dc voltage ac voltage description of functions equivalent circuit diagram in pin 16 lch audio source in 1.5v reference output level =-15dbv maximum input level =-3dbv lch audio input pin 17 base band in 1.5v reference output level =-16dbv maximum output level =-10dbv base band input pin 18 rch audio source in 1.5v reference output level =-15dbv maximum input level =-3dbv rch audio source input pin 19 rch hp in 1.5v reference output level =-16dbv (@base band input) =-21dbv (@audio source input) maximum input level =-10dbv (@base band input) =-9dbv (@audio source input) rch hp input pin 20 rch evr out 1.5v reference output level =-16dbv (@base band input) =-21dbv (@audio source input) maximum input level =-10dbv (@base band input) =-9dbv (@audio source input) rch evr output pin continued on next page. 25k vref 25k v cc a 16 500 vref 50k v c c a 17 25k vref 25k v cc a 18 1k vref 50k v cc hp 19 500 20 v cc a
LA74322LP no.a1283-11/14 continued from preceding page. pin pin name dc voltage ac voltage description of functions equivalent circuit diagram in pin 21 rch spk in 1.65v reference output level =-16dbv (@base band input) =-21dbv (@audio source input) maximum input level =-10dbv (@base band input) =-9dbv (@audio source input) rch speaker input pin 22 rch spk(-)out 1.65v reference output level =-1dbv (@audio source input =-15dbv) rch speaker reverse phase output pin 23 gnd spk(r) 0v rch speaker gnd pin 24 rch spk(+)out 1.65v reference output level =-1dbv (@audio source input =-15dbv) rch speaker normal phase output pin 25 v cc sp(r) 3.6v rch speaker power pin 26 v cc sp(l) 3.6v lch speaker power pin 27 nc nc pin 28 gnd spk(l) 0v lch speaker gnd 29 nc nc pin 30 nc nc pin 31 lch evr out 1.5v reference output level =-16dbv (@base band input) =-21dbv (@audio source input) maximum input level =-10dbv (@base band input) =-9dbv (@audio source input) lch evr output pin continued on next page. 21 v cc sp(r) 5k 25k 22 5k v cc sp(r) 25k 22 21 v cc sp(r) 20.5k 24 20k 22 500 31 v cc a
LA74322LP no.a1283-12/14 continued from preceding page. pin pin name dc voltage ac voltage description of functions equivalent circuit diagram in pin 32 lch hp in 1.5v reference output level =-16dbv (@base band input) =-21dbv (@audio source input) maximum input level =-10dbv (@base band input) =-9dbv (@audio source input) lch hp input pin 33 vrefsp 1.65v spk vref and ripple rejection pin 34 standby l standby control pin 35 lch hp out 1.5v reference output level =-23.5dbv maximum output level =-3dbv lch hp output pin 36 gnd hp 0v hp gnd pin 37 rch hp out 1.5v reference output level =-23.5dbv maximum output level =-3dbv rch hp output pin continued on next page. 1k vref 50k v cc hp 32 400 33 v cc sp(l) 250k 2k 215k 38k 34 23k 2.6k 37 74 1.8k v cc hp 2.6k 35 74 1.8k vref v cc hp
LA74322LP no.a1283-13/14 continued from preceding page. pin pin name dc voltage ac voltage description of functions equivalent circuit diagram in pin 38 v cc hp 3.0v hp & receiver speaker power pin 39 receiver (+) out 1.5v reference output level =-10dbv (@ evr=max audio source input =-30dbv) receiver speaker normal phase output pin 40 receiver gnd 0v receiver gnd internal equivalent circuit diagram 20.5k 39 20k v cc hp 1
LA74322LP no.a1283-14/14 ps this catalog provides information as of july, 20 08. specifications and info rmation herein are subject to change without notice. sanyo semiconductor co.,ltd. assumes no responsibil ity for equipment failures that result from using products at values that exceed, even momentarily, rated v alues (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all sanyo semiconductor co.,ltd. products described or contained herein. sanyo semiconductor co.,ltd. strives to supply high-qua lity high-reliability products, however, any and all semiconductor products fail or malfunction with some probab ility. it is possible that these probabilistic failures or malfunction could give rise to accident s or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. when designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of sanyo semiconductor co.,ltd. or any third party. sanyo semiconductor co.,ltd. shall not be liable for any claim or suits with regard to a third party's intellectual property rights which has resulted from the us e of the technical information and products mentioned above. information (including circuit diagrams and circuit par ameters) herein is for example only; it is not guaranteed for volume production. any and all information described or contained he rein are subject to change without notice due to product/technology improvement, etc. when designing equip ment, refer to the "delivery specification" for the sanyo semiconductor co.,ltd. product that you intend to use. in the event that any or all sanyo semiconductor co.,ltd. products described or contained herein are controlled under any of applicable local export control l aws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of sanyo semiconductor co.,ltd.


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